General Purpose Counter Image

General Purpose Counter Image

Dual Counter

Dual Counter

Transition

Transition

Multiple Write Channels

Multiple Write Channels

Multiple Read Channels

Multiple Read Channels

Read And Write Fifo Data

Read And Write Fifo Data

Shared Register

Shared Register

Shift Shift Register

Shift Shift Register

Conditional Transition

Conditional Transition

Register for Event

Register for Event

_Framework Signals

_Framework Signals

_State Reg Rec

_State Reg Rec

_Signal Assignments

_Signal Assignments

_Component Instantiation

_Component Instantiation

_Disable File

_Disable File

_Resource Select

_Resource Select

_TOP

_TOP

_Reading Data From A File

_Reading Data From A File

_Declaration of Signals

_Declaration of Signals

_State Machine Construction

_State Machine Construction

_Config File

_Config File

_Library File

_Library File

_Signal Processing Chain

_Signal Processing Chain

_SpeakHDL Generated Files

_SpeakHDL Generated Files