| Parameter | Description | Type | Allowable Values | Default Values |
|---|---|---|---|---|
| clock_pin | system clock pin location | string | <string> | <> |
| reset_pin | system reset pin location | string | <string> | <> |
| sys_clk_freq | default sys_clk frequency | integer | 1 - 400E6 | 100E6 |
| reset_polarity | asserted polarity for reset_pin to cause system reset | std_logic | {'0', '1'} | '1' |
| data_width |
system data path width for
fifo_data
,
shift_left
,
shift_right
,
and exchange_register |
integer | 0-64 | 32 |
| control_width | system control path ( shared_register ) width | integer | 0-64 | 32 |