SpeakHDL Project Directory Structure
The directory tree below shows the suggested directory structure for a SpeakHDL project.
[detail level 12345]
 ▼ speakhdl_projectsCommon folder containing the encrypted library file that is referenced by all SpeakHDL projects
 ▼ example_project[user created] Folder containing the SpeakHDL source folder and any vendor generated simulation/synthesis files and folders
 ▼ source[user created] Folder containing all application module .vhd files and the top directory that is included recursively in simulation/synthesis tools
 ▼ top[auto-generated]: Folder containing (4) auto-generated files that are created or updated when the 'ok' command is given
 PINOUT.xdc[auto-generated]: Constraints file containing the system clock frequency constraint and all application module pinout locations
 TESTBENCH.vhd[auto-generated]: Testbench file that drives the clock 'vector' and reset signal and instantiates the TOP level file
 TOP.vhd[auto-generated]: Top level VHDL file that instantiates all application modules directly
 USER_DEFS_PKG.vhd[auto-generated]: Definitions file containing constants necessary for compilation of the library file and application module indexes
 app_module_1.vhd[user created] Application module file
 app_module_2.vhd[user created] Application module file
 data_array.dat[optional] Data file containing an array of std_logic_vector values
 IO_CONFIG.cfg[auto-generated]: Configuration file containing the sys_clk frequency, VHDL constants, aliases, and application module pinout information
 ok.log[auto-generated]: Log file detailing any error or warning information reported after the 'ok' command is given
 SPEAKHDL_API_PKG.vhdp[downloaded]: Encrypted library file that is referenced by all SpeakHDL projects and included as input to simulation/synthesis tools